无锡招聘

3. The roles: - owning, and maintaining P & R scripts for block gate netlist to GDSII - P & R, extraction, Power IR, EM of block level and Physical verification - Work with front end engineer for timing closure activities Requirements: -BSEE is required -3+ years of ASIC/SoC Physical Design; floor planning, power grid customization, P&R, CTS, and DRC/LVS/ERC/Antenna debugging skills -Experience driving CTS to meet requirements -Experience with either one of P&R tools; Cadence EDI, or Synopsys IC Compiler -Proficiency using TCL, Perl and make scripting -Mass production experience a plus -Familiar with design flow of major foundries What you'll be doing: - Owning and maintaining P & R scripts for block gate netlist to GDSII - Executes all aspects of physical design flows such as floor planning, place and route, reliability checks, manufacturability checks, timing closure, noise analysis, formal verification, integration of custom circuits/layout, timing analysis, constraint generation.

Contact:hr_wuxi@quantenna.com

宽腾达通讯（无锡）有限公司成立于2011年3月18日，总投资200万美元，是一家由美国硅谷顶尖的风险基金投资的无晶园芯片开发公司，致力于开发802. 11n MIMO无线局域网芯片组。宽腾达公司成立于2006年，总部位于美国加州Fremont，并在澳洲悉尼和中国大陆无锡开设有研发分部。作为业界第一家商用化4*4MINO方案提供商，这些芯片组为无线网络和设备提供高的性能、速度和可靠性。宽腾达公司目前产品已经商用，客户包括摩托罗拉NETGEAR等著名的设备生产商，和瑞士电信等一流电信运营商。