苏州 [切换城市] 苏州招聘苏州电子/电器/半导体/仪器仪表招聘苏州集成电路IC设计/应用工程师招聘

猎头-视频算法 system& MCU design and verification

上海芯相会企业管理咨询有限公司

  • 公司规模:50-150人
  • 公司性质:民营公司
  • 公司行业:电子技术/半导体/集成电路  互联网/电子商务

职位信息

  • 发布日期:2013-10-15
  • 工作地点:上海
  • 招聘人数:4
  • 学历要求:本科
  • 职位类别:集成电路IC设计/应用工程师  IC验证工程师

职位描述

猎头--高级视频算法工程师

职位描述:

工作目标:视频编解码方面的算法研发、实现和优化,针对硬件逻辑特点进行算法优化。


职位描述:负责视频编解码方面的算法研发和实现,并结合硬件逻辑特点进行算法改进。


资历要求:

1. 在视频编解码方面有两年以上研发经验,具有扎实的视频编码理论基础;

2. 熟悉H.264、HEVC等视频编解码标准,掌握X264、HM等开源代码;

3. 有扎实的编程功底,熟练使用C/C++,有软件优化经验;

4. 英文熟练,有良好的英语阅读和书面表达能力;

5. 硕士以上学历;

6. 工作认真负责,严谨细致,有良好的创新意识和团队精神;

7. 满足下列条件者之一优先考虑:

a) 熟悉HEVC视频编码标准,对HM代码熟练掌握;

b) 具有芯片设计相关知识或芯片算法设计经验;

c) 具有DSP/ARM等嵌入式平台上算法实现、优化的设计经验;

d) 参与HEVC标准制订工作经验。



Senior system design engineer

Job description:

The candidate will be responsible for:

l Design and integration an AXI/AHB based system including host processor, DDR controller, SD/MMC, Display I/F and other peripherals., as a verification/demo platform for the in-house designed video IP’s;

l Build up the simulation based environment for the system, for the functional verification;

l Investigate and develop related drivers for the used IP’s in the system;

l Use ISE/Vivado/Quart, implement the design to Altera/Xilinx FPGAs,

l Work with SW engineer, to bring up system/OS on the FPGA prototyping board. Debug and resolve failures with Logic Analyzer and/or ChipScope/SignalTap;

Qualification:

l BS with 5+ years or MS with 2+ years experiences in electronic engineering/micro-electronics;

l Must be highly self-motivator and good team player;

l Good understanding and hands-on experiences in SOC development and related methodology;

l Solid skills in logic design with Verilog/VHDL, timing closure and analysis;

l Familiar with FPGA implementation with ISE/Quartus and debugging;

l Knowledge and hands-on experiences in at least 2 of the below fields are required;

n AXI/AHB bus protocols;

n Design or bring-up of DDR2/3 controller/PHY;

n Display interfaces/protocols such as LVDS/HDMI;

n SD/MMC controller;

n NAND/NOR flush controller;

#2. CPU Verification Intern

Job description:

The candidate will take part in verification for the in-house designed CPU/MCU, including:

l Maintain and improve the verification environment and flow;

l Make the test plan according to the design specification, and execute it with System verilog based coverage monitors/assertions;

l Develop direct tests and constraint random tests;

l Coverage data collection and analysis;

Qualification:

l Graduate student who will graduate in 2015, major in electronic engineering/micro-electronics;

l Must be highly self-motivated, eager to learn and accept new knowledge, a quick learner;

l Could work at least 4 days every week;

l Knowledge and understanding of computer architecture and micro-architecture of RISC processors

l Familiar with front-end ASIC design flow and Verilog HDL;

l Familiar or experiences in high-level verification methodology (VMM/UVM/OVM), and/or hardware verification language (SystemC/SystemVerilog) would be a great plus;

l Experiences or skills in assembly programming, and using scripting languages (Perl/Tcl/Shell) for flow automation is a plus;

#3. (Senior) MCU design and verification engineer

Job description:

The candidate will be responsible for in-house micro-controller design and verfication, including:

l Micro-architecture definition;

l Logic implementation with Verilog HDL;

l Functional verification and performance tuning;

l Synthesis and timing closure;

l Develop direct tests and constraint random tests;

l Coverage data collection and analysis;

Qualification:

l BS with 5+ years or MS with 2+ years experiences in electronic engineering/micro-electronics;

l Must be highly self-motivator and good team player;

l Solid skills and rich experiences in logic design, synthesis and timing analysis;

l Familiar with all front-end flows including LINT check, simulation, synthesis, STA, formal and power analysis, etc.;

l Knowledge and experiences in Computer Architecture and RISC processor (ARM/MIPS/SPARC) micro-architecture, familiar with associated tool-chains such as compiler, assembler, debugger etc.;

l Familiar with CABAC algorithm in video coding standard such like H.264/AVC and HEVC or hands-on engineering experiences in video codec development is a big plus;

E-Mail: bestgrace@qq.com

QQ: 2043753191

新浪blog: http://blog.sina.com.cn/u/1767088102

新浪微博: http://weibo.com/bestgrace


公司介绍

Principal Consultant & General Manager @ Hi-Talent Consulting Co.,Ltd.
上海芯得企业管理咨询有限公司
上海芯相会企业管理咨询有限公司
上海戴引企业管理咨询有限公司
专注于IC和IT 互联网 金融 高科技领域的猎头公司

联系方式

  • Email:hr@hi-talent.com
  • 公司地址:上班地址:上海