上海招聘

Responsibilities:
- Know FPGA architecture and development tools
- Know FPGA debug tools
- Be able to design specific module and system in Verilog/VHDL
- Be able to write test bench to implement function verification
- Be able to compile scripts to meet various automatic testing requirement
- Responsible for synthesis tool evaluation and verification
- Responsible for simulation module function validation
- Responsible for 3rd party simulation tools evaluation and verification
- Provide QA testing report for SW release

工作职责：
? 了解FPGA的结构及开发工具
? 了解FPGA的调试工具
? 运用硬件描述语言进行模块及系统设计
? 运用硬件描述语言实现功能验证
? 编写脚本，实现自动化测试的需求
? 综合工具的评估和验证
? 仿真模型的功能验证
? 仿真工具的评估和测试
? 为软件发布提供QA测试报告

Qualifications:
- BS (2+ years), MS (Entry) in Electrical Engineering, Control engineering or relevant major
- Experience in digital logic circuits design with FPGA application
- Experience in Verilog/VHDL coding
- Experience in applying EDA tools such as Diamond, ISE or Quartus
- Familiar with script language (Python, Perl, Tcl or Shell and etc.)
- Good written and verbal communication skills in English
- High level of Windows, UNIX and Linux skills and knowledge


任职要求：
? 理工学士学位，具有2以上年工作经验；或硕士学位。电子信息、自动控制、电气工程或相关专业毕业
? 具有数字电路基础、系统设计及FPGA运用经验
? 精通VHDL/Verilog HDL编程
? 熟练运用综合工具和仿真工具
? 熟悉脚本语言（Python，Perl 或 Shell）及程序设计
? 具有良好的英文书面及口头沟通能力
? 熟练运用Windows、UNIX及Linux操作系统

Software Development Engineer
Shanghai, China
Job #:10-0741
Please apply here:
http://www.latticesemi.com.cn/careers/default.htm
Responsibilities:
Work at the Design Planner group for the maintenance of DesignPlanner code in isplever system and the enhancements in Diamond system on GUI and its mid-ware part with various programming languages including scipts.
Be able to analyze the defects and quickly locate the correct points in code, provide correct solution soon.
Work at the other GUI tools, specially the graphic tools in our integration design Enviornement solution.
Be able to design new applications, code, unit testing and bug fix.


Qualifications:


5+ years B.S. or 3+ years M.S. majoring in E.E. & C.S.
Strong background in using C/C++, Qt and Tcl/Tk proramming on Windows/Linux platforms. Java programming is preferred.
Working experiences of coding, debugging, fixing bug in real projects.
Familiar with VHDL/Verilog hardware descripting language is preferred.
Loyal to the company, intends to build a good career in Lattice Shanghai.
Enginlish communication capability.
Mature personality & be responsible.
Competition concept, sense of urgency.

莱迪思半导体公司是从事世界上最先进的超大规模可编程逻辑器件及相应的EDA软件系统的研究、设计、开发、生产的专业公司之一，是在系统可编程技术（In System Programmability，简称ISP）及器件的发明者和供应商，是世界上三大可编程逻辑器件供应商之一。

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上海莱迪思半导体有限公司是美国莱迪思半导体公司于1993年6月经中国政府批准在上海独资建立的设计开发中心，拥有世界一流的设备和工作环境。公司员工大多数具有硕士以上学位或高级职称。公司主要从事世界一流FPGA、CPLD器件及相应电子设计自动化软件（EDA Software）的设计开发，并向中国大陆以及亚洲其他国家与地区的莱迪思用户提供技术应用支持、培训和咨询服务。