上海招聘

Senior FPGA design engineer

Job description:
The FPGA design engineer will be the key participant in complex digital FPGA/ASIC development.

Responsibilities:
The candidate will responsible for write functional spec or verification plan, build FPGA verification environment, write test-case, run simulation and debug the design, also responsible for build the FPGA bit file, including FPGA synthesis, timing & area optimization, mapping and route .

Requirement:
1: Strong logic design/debug ability and good RTL implementation skill a must.
2: Experience with use the Xilinx or Altera FPGA is must (Vertex, Spartan or Cyclone series FPGA).
3: Knowledge of ARM/8051 programming.
4: Experience on SPI/URAT/JTAG/I2C communication protocol.
5: Experience on digital IP design.

Desired Skills:
1: In-depth knowledge of the ASIC design flow (such as chip architecture, RTL coding, function verification, FPGA validation and gate-level simulation).
2: Knowledge of the data encryption or video/audio algorithm is plus.
3: Programming using script language (such as unix shell, Perl, Tcl, etc)

Education:
Requires MSEE or BSEE/CS degree equivalent plus significant experience in FPGA or ASIC design.3+years of hand-on design experience

        公司简介（Company Overview）
       上海滕维信息科技有限公司是由美国硅谷海归创建的高科技公司，公司注册资本1100万元。我们致力于计算机通讯、多媒体和网络系统相关的集成电路的开发和应用，尤其在智能卡、2.4Ghz无线、多媒体、保密通讯、数据安全等方面具有世界领先水平。我们正在扩大我们的核心团队，希望对相关领域感兴趣的有志之士们加入我们，共同努力，伴随公司高速成长的同时，为自己的职业生涯留下亮丽的一笔!