Standard Cell Library Engineer
苏州兆芯半导体科技有限公司
- 公司规模：50-150人
- 公司性质：民营公司
- 公司行业：电子技术/半导体/集成电路
职位信息
- 发布日期：2013-01-21
- 工作地点：苏州
- 招聘人数：若干
- 工作经验：一年以上
- 学历要求：本科
- 职位类别：集成电路IC设计/应用工程师
职位描述
Job Title: Standard Cell Library Engineer
Department: Standard Cell Library
Location: Shanghai
Job Description:
Design standard cell libraries in 40nm and below. Take responsibilities for
-Circuit design and guiding layout design
-Verilog modeling
-Characterization
-EDA views generation
-Quality Assurance of library data
-Customer support
Qualifications:
-MSEE or BSEE with 1 or more years experience in standard cell library design or relevant industrial fields
-Skilled in CMOS circuit and layout design
-Familiar with verilog
-Experience in standard cell characterization
-Familiar with various popular EDA tools
-Skilled in program language such as Unix shell, perl, tcl, C++ and so on
-Experience in 40nm and below a plus
-Good team work capability
Department: Standard Cell Library
Location: Shanghai
Job Description:
Design standard cell libraries in 40nm and below. Take responsibilities for
-Circuit design and guiding layout design
-Verilog modeling
-Characterization
-EDA views generation
-Quality Assurance of library data
-Customer support
Qualifications:
-MSEE or BSEE with 1 or more years experience in standard cell library design or relevant industrial fields
-Skilled in CMOS circuit and layout design
-Familiar with verilog
-Experience in standard cell characterization
-Familiar with various popular EDA tools
-Skilled in program language such as Unix shell, perl, tcl, C++ and so on
-Experience in 40nm and below a plus
-Good team work capability
公司介绍
苏州兆芯半导体科技有限公司于2012年3月在苏州工业园区创意产业园成立，资金1800万元人民币，从事先进工艺基础IP库研发，为半导体设计公司提供全套基础IP库的解决方案。同时，为集成电路设计公司提供特种基础IP库的定制化及相关设计服务业务。公司将提供高度灵活的用人机制，有竞争力的薪酬待遇，为个人发展提供广阔的空间。我们期待您的加入，携手共进,与公司一起共同成长、共创双赢!