上海招聘

Major Responsibilities:

Work with customers to integrate complex soft IPs such as CPU, memory controller or other from RTL to production including configuration, gate level netlist generation and function verification.
- Develop in-house IP testing and debugging methodology.
- Participate in SoC architecture definition, SoC integration and verification
- Create and optimize STA constraints
- Work with back-end team to ensure a successfully implementation until tape-out by performing RTL rule check, synthesis, STA, LEC and power analysis etc


Job Requirement:

Knowledge, Skills and Abilities:
Education: Bachelor degree in Electrical Engineering or related area, MSEE is preferred
Experience: 4 years or above experience in ASIC/complex SoC design or verification

- Familiar with hardware description languages such as Verilog, System Verilog and VHDL
- Knowledge of script language, such as Tcl, Python, Perl are required
- Familiar with IC design & verification tool flow with hands-on experience in DC, PT, NC-Sim and/or Spyglass
- Good English and communication skills; will need frequent communication with foreign team.
- Experience with ARM/MIPS architecture and related integration.
- Good knowledge of RTL simulation and synthesis. Knowledge of design for low power and design for manufacturing
- Able to write C/C++ code to model RTL blocks for simulation and verification.
- Able to write reusable Verilog RTL codes, follow design and DFT guidelines.
- Able to write verification test plans, and be able to run synthesis, static timing analysis, formal verification.
- Good verbal and written English

公 司 简 介
世芯电子（上海）有限公司是由美国硅谷工程师创办的外商独资企业，主要提供Fabless ASIC芯片设计技术服务。我们拥有世界一流芯片设计的团队，多次为海外公司成功地提供了基于45纳米µm、低功耗工艺的大型高端芯片的设计服务。
高尖端的科技是您通往事业之路的桥梁，理想的工作环境是您展示才华的舞台，现招聘致力于芯片设计的卓越人才加入我们：
About Us
Alchip Technologies Limited was founded in 2002 by semiconductor veterans from Silicon Valley and Japan with a business focus on turnkey fabless ASIC production for System-on-Chip (SoC) designs. The founding team has more than fifteen years experience on average in successfully developing high-complexity SoC products and has 100% first silicon success track record.

As chip complexity increases and process technology advances, physical design becomes the bottleneck of chip creation. According to Collett International Research, more than 65% of IC/ASIC designs required re-spins in 2003, seriously impacting product schedule and putting companies under tremendous time-to-market pressure. With excellent design expertise and proven SoC design methodology, Alchip enables customers achieve one-pass silicon success and therefore meet customers faster-time-to-market.

In addition to enabling customers faster-time-to-market, Alchip also helps customers reduce cost through design and product engineering. Facing today’s competitive markets, most semiconductor companies are under great cost pressure. Alchip endows customers cost advantage over competitors in the increasingly competitive markets.

In summary, customers will be able to focus on chip functionality and system design by outsourcing physical design and chip production to Alchip. Alchip’s leading-edge solutions ensure customers faster time to market and improved cost efficiency. It is a win-win for both sides.

Alchip currently has offices in Silicon Valley, Shin-Yokohama, Hsin-Chu, Taipei,Shanghai, Wuxi, Hefei,Guangzhou,Jinan.