ASIC 数字电路设计 主任工程师 (职位编号:0003)
上海矽睿科技有限公司
- 公司规模:150-500人
- 公司性质:民营公司
- 公司行业:电子技术/半导体/集成电路
职位信息
- 发布日期:2016-10-28
- 工作地点:上海-嘉定区
- 招聘人数:2人
- 工作经验:5-7年经验
- 学历要求:硕士
- 职位月薪:20000-40000/月
- 职位类别:集成电路IC设计/应用工程师 电路工程师/技术员(模拟/数字)
职位描述
职位描述:
职位描述
该职位负责开发和设计用于MEMS 传感器的SOC中的数字系统。这些MEMS传感器广泛用于智能手机,平板电脑,导航和游戏等设备。该职位负责完成产品需求归档,系统架构评估和设计,RTL编码,设计和验证, 以及基于标准单元库的ASIC或FPGA实现。 该职位需要与模拟/混合电路设计师,验证工程师和物理实现工程师紧密合作。
职位要求
? ASIC 设计领域. 必须具备以下各方面的良好技能:Verilog RTL coding, low power design methodology, clock domain crossings, memory/FIFO and simple processor design, I2C AND SPI, and FPGA design and bring-up (Xilinx ISE)
? 在ASIC的设计流程的各环节具有丰富的经验,包括:floor-planning, synthesis, static timing analysis, equivalence checking, SCAN insertion, ATPG, DFT, ECO, bringup/lab debug, and ATE test development
? 参与产品定义及客户支持. 需要与系统架构师,市场,和应用工程师良好协作以保证产品满足规格和客户需求。配合产品经理以保证产品进度。
? 电子工程或相关专业的本科以上学位
? 至少5年以上工作经验
有意者,请将简历发送至hr@qstcorp.com,合则约见。
Description
This position will be responsible for design and development of RTL code for use in ASIC designs of MEMS based sensor SOC for variety of cutting edge applications such as gaming, handsets, and navigation. Designing these devices requires understanding and interest in working at the full chip level, utilizing knowledge in the area of RTL design for low power and multiple clock and power domains.
Deliverables will include requirements documentation, architecture evaluation and design, RTL code, designing and verifying digital blocks that are implemented in standard cell ASIC and/or FPGA. You will work closely with verification, analog/ mixed signal, firmware, and physical design engineers to support full chip implementation with emphasis on the SOC logic architecture and design.
The successful candidate will have extensive experience in architecture/micro-architecture design, digital design through RTL coding in Verilog, synthesis and simulation, pre- and post-silicon verification methodologies with industry standard tools. A background in processor architecture, arbitration logic, I2C, SPI, DMA, interrupt architecture, low power architecture, clock domain crossing, simple DSP architecture and modeling is required. Good communication, organization, problem solving, and ability to work seamlessly with others in a fast paced environment is highly desired.
Requirements
? ASIC design focus. Must have experience in Verilog RTL coding, low power design methodology, clock domain crossings, memory/fifo and simple processor design, and FPGA design and bring-up (Xilinx ISE)
? Experience with all stages in the ASIC design flow including floor-planning, synthesis, static timing analysis, equivalence checking, SCAN insertion, ATPG, DFT, ECO, bringup/lab debug, and ATE test development
? Participate in product definition, early customer support. Work with architect, marketing, and applications engineering to ensure finished product meets technical specifications and customers’ needs.
? Work with project manager to ensure designs delivered on schedule
? Minimum 7 years’ experience
? BS/MS in EE or equivalent field
Desired Skills
? Experience in coding test benches, bfm development, and design verification
? Experience with I2C and SPI
? Experience debugging with lab equipment such as logic analyzers, oscilloscopes, signal generators, etc.
? Experience with scripting languages such as perl, tcl, etc
Please send your CV to hr@qstcorp.com if you are interested in this position.
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职位描述
该职位负责开发和设计用于MEMS 传感器的SOC中的数字系统。这些MEMS传感器广泛用于智能手机,平板电脑,导航和游戏等设备。该职位负责完成产品需求归档,系统架构评估和设计,RTL编码,设计和验证, 以及基于标准单元库的ASIC或FPGA实现。 该职位需要与模拟/混合电路设计师,验证工程师和物理实现工程师紧密合作。
职位要求
? ASIC 设计领域. 必须具备以下各方面的良好技能:Verilog RTL coding, low power design methodology, clock domain crossings, memory/FIFO and simple processor design, I2C AND SPI, and FPGA design and bring-up (Xilinx ISE)
? 在ASIC的设计流程的各环节具有丰富的经验,包括:floor-planning, synthesis, static timing analysis, equivalence checking, SCAN insertion, ATPG, DFT, ECO, bringup/lab debug, and ATE test development
? 参与产品定义及客户支持. 需要与系统架构师,市场,和应用工程师良好协作以保证产品满足规格和客户需求。配合产品经理以保证产品进度。
? 电子工程或相关专业的本科以上学位
? 至少5年以上工作经验
有意者,请将简历发送至hr@qstcorp.com,合则约见。
Description
This position will be responsible for design and development of RTL code for use in ASIC designs of MEMS based sensor SOC for variety of cutting edge applications such as gaming, handsets, and navigation. Designing these devices requires understanding and interest in working at the full chip level, utilizing knowledge in the area of RTL design for low power and multiple clock and power domains.
Deliverables will include requirements documentation, architecture evaluation and design, RTL code, designing and verifying digital blocks that are implemented in standard cell ASIC and/or FPGA. You will work closely with verification, analog/ mixed signal, firmware, and physical design engineers to support full chip implementation with emphasis on the SOC logic architecture and design.
The successful candidate will have extensive experience in architecture/micro-architecture design, digital design through RTL coding in Verilog, synthesis and simulation, pre- and post-silicon verification methodologies with industry standard tools. A background in processor architecture, arbitration logic, I2C, SPI, DMA, interrupt architecture, low power architecture, clock domain crossing, simple DSP architecture and modeling is required. Good communication, organization, problem solving, and ability to work seamlessly with others in a fast paced environment is highly desired.
Requirements
? ASIC design focus. Must have experience in Verilog RTL coding, low power design methodology, clock domain crossings, memory/fifo and simple processor design, and FPGA design and bring-up (Xilinx ISE)
? Experience with all stages in the ASIC design flow including floor-planning, synthesis, static timing analysis, equivalence checking, SCAN insertion, ATPG, DFT, ECO, bringup/lab debug, and ATE test development
? Participate in product definition, early customer support. Work with architect, marketing, and applications engineering to ensure finished product meets technical specifications and customers’ needs.
? Work with project manager to ensure designs delivered on schedule
? Minimum 7 years’ experience
? BS/MS in EE or equivalent field
Desired Skills
? Experience in coding test benches, bfm development, and design verification
? Experience with I2C and SPI
? Experience debugging with lab equipment such as logic analyzers, oscilloscopes, signal generators, etc.
? Experience with scripting languages such as perl, tcl, etc
Please send your CV to hr@qstcorp.com if you are interested in this position.
职能类别: 集成电路IC设计/应用工程师 电路工程师/技术员(模拟/数字)
关键字: 集成电路 ASIC 数字电路设计 主任工程师
公司介绍
上海矽睿科技有限公司(QST,以下简称:矽睿科技)从事高端MEMS传感器业务。公司以消费电子、汽车、工业控制、通信与医疗等领域为主要目标市场,设计和生产优质传感器产品,并为客户提供相应的系统解决方案和服务。主要产品:加速度传感器、磁传感器、气压高度计、陀螺仪、组合惯性传感器及相关智能应用系统。
公司聚集了来自国内外顶尖专业MEMS人才,团队成员分布在上海,深圳,中国香港,中国台湾,美国等;覆盖了MEMS工艺研发、传感器设计和ASIC设计、工程和量产封装测试、系统应用软件等领域。公司研发实力雄厚,始终坚持自主创新,目前已申请70余项国家发明专利和11项国际发明专利,国家发明专利授权30余项,国际专利授权2项。专利组合遍布工艺制程、芯片设计、算法和系统软件。先后研发形成销售的磁传感器系列,加速度计系列,陀螺仪,六轴组合传感器等系列产品。公司拥有传感器配套ASIC&MCU平台,涵盖各类传感器配套ASIC&MCU方案,可作为各类传感器的接口运算电路。基于传感器基础算法的研究,建立了种类丰富的智能系统方案架构模型,可应用于各类移动智能终端、可穿戴设备、智能家居及物联网应用的开发。
公司曾获得中国电子成就奖2014年度***设计团队奖;2016年度大中华IC设计五大大中华创新IC设计公司; 2017年荣获上海市高新技术企业、上海市专精特新企业、中国半导体MEMS十强企业、嘉定区四大产业集群企业等一系列荣誉。
矽睿科技通过创新研发,将不断为客户提供高质量产品。凭借先进的技术、高效的执行力和优质的服务,矽睿科技立志成为一家全球化传感器系统公司,争取在MEMS传感器领域占据核心地位。
公司基本福利如下:
1、人性化、弹性的考勤制度;
2、双休,法定公休,每年10-15天带薪年假;
3、按照上海市相关规定缴纳五险一金,并为员工及家庭成员购买补充医疗险;
4、定期组织全公司员工活动;
5、完善的薪酬体系,多种绩效激励机制;
6、立体式的培训体系(内训、导师制、外训等),多渠道发展空间;
7、餐饮补贴等;
8、为员工提供体育运动设施。
加入矽睿科技,放飞梦想,收获感动。
公司聚集了来自国内外顶尖专业MEMS人才,团队成员分布在上海,深圳,中国香港,中国台湾,美国等;覆盖了MEMS工艺研发、传感器设计和ASIC设计、工程和量产封装测试、系统应用软件等领域。公司研发实力雄厚,始终坚持自主创新,目前已申请70余项国家发明专利和11项国际发明专利,国家发明专利授权30余项,国际专利授权2项。专利组合遍布工艺制程、芯片设计、算法和系统软件。先后研发形成销售的磁传感器系列,加速度计系列,陀螺仪,六轴组合传感器等系列产品。公司拥有传感器配套ASIC&MCU平台,涵盖各类传感器配套ASIC&MCU方案,可作为各类传感器的接口运算电路。基于传感器基础算法的研究,建立了种类丰富的智能系统方案架构模型,可应用于各类移动智能终端、可穿戴设备、智能家居及物联网应用的开发。
公司曾获得中国电子成就奖2014年度***设计团队奖;2016年度大中华IC设计五大大中华创新IC设计公司; 2017年荣获上海市高新技术企业、上海市专精特新企业、中国半导体MEMS十强企业、嘉定区四大产业集群企业等一系列荣誉。
矽睿科技通过创新研发,将不断为客户提供高质量产品。凭借先进的技术、高效的执行力和优质的服务,矽睿科技立志成为一家全球化传感器系统公司,争取在MEMS传感器领域占据核心地位。
公司基本福利如下:
1、人性化、弹性的考勤制度;
2、双休,法定公休,每年10-15天带薪年假;
3、按照上海市相关规定缴纳五险一金,并为员工及家庭成员购买补充医疗险;
4、定期组织全公司员工活动;
5、完善的薪酬体系,多种绩效激励机制;
6、立体式的培训体系(内训、导师制、外训等),多渠道发展空间;
7、餐饮补贴等;
8、为员工提供体育运动设施。
加入矽睿科技,放飞梦想,收获感动。
联系方式
- Email:hr@qstcorp.com
- 公司地址:地址:span海淀区西三环北路89号8层A-478